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Design and Analysis of RCA and CLA using CMOS, GDI, TG and ECRL Technology
( Vol-4,Issue-11,November 2017 )
Author(s):

Kuldeep Singh Shekhawat, Gajendra Sujediya

Keywords:

Adders, CMOS, GDI, TG, ECRL.

Abstract:

VLSI technology has developed over the years thereby enhancing the performance of chips in terms of three basic constraints viz. delay, power and area. In today’s scenario compact and small digital devices are critical concern in the field of VLSI design, which should perform fast as well as low power consumption. Optimizing the delay, area and power of an adder is a major design issues, as area and speed are usually conflicting constraints. Adders can be designed with conventional CMOS technology but for compact and low power consumption we can design circuit using adiabatic logic and with other technology GDI,ECRL, transmission Gate.

ijaers doi crossref DOI:

10.22161/ijaers.4.11.19

Paper Statistics:
  • Total View : 151
  • Downloads : 16
  • Page No: 126-129
Cite this Article:
MLA
Kuldeep Singh Shekhawat et al ."Design and Analysis of RCA and CLA using CMOS, GDI, TG and ECRL Technology". International Journal of Advanced Engineering Research and Science(ISSN : 2349-6495(P) | 2456-1908(O)),vol 4, no. 11, 2017, pp.126-129 AI Publications, doi:10.22161/ijaers.4.11.19
APA
Kuldeep Singh Shekhawat, Gajendra Sujediya(2017).Design and Analysis of RCA and CLA using CMOS, GDI, TG and ECRL Technology. International Journal of Advanced Engineering Research and Science(ISSN : 2349-6495(P) | 2456-1908(O)),4(11), 126-129. http://dx.doi.org/10.22161/ijaers.4.11.19
Chicago
Kuldeep Singh Shekhawat, Gajendra Sujediya. 2017,"Design and Analysis of RCA and CLA using CMOS, GDI, TG and ECRL Technology". International Journal of Advanced Engineering Research and Science(ISSN : 2349-6495(P) | 2456-1908(O)).4(11):126-129. Doi: 10.22161/ijaers.4.11.19
Harvard
Kuldeep Singh Shekhawat, Gajendra Sujediya. 2017,Design and Analysis of RCA and CLA using CMOS, GDI, TG and ECRL Technology, International Journal of Advanced Engineering Research and Science(ISSN : 2349-6495(P) | 2456-1908(O)).4(11), pp:126-129
IEEE
Kuldeep Singh Shekhawat, Gajendra Sujediya."Design and Analysis of RCA and CLA using CMOS, GDI, TG and ECRL Technology", International Journal of Advanced Engineering Research and Science(ISSN : 2349-6495(P) | 2456-1908(O)),vol.4,no. 11, pp.126-129,2017.
Bibtex
@article {kuldeepsinghshekhawat2017design,
title={Design and Analysis of RCA and CLA using CMOS, GDI, TG and ECRL Technology},
author={Kuldeep Singh Shekhawat, Gajendra Sujediya},
journal={International Journal of Advanced Engineering Research and Science},
volume={4},
year= {2017},
}
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References:

[1] Baljinder Kaur and Narinder Sharma, “Design of Full Adder in 180nm Technology using TG and Adiabatic Logic”, International Journal of Computer Techniques, vol. 3, Issue 2, pp. 164-170, Mar-Apr 2016.
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[3] S.Soundarya, Ms.S.Anusooya, “Design and analysis of Low power Carry Look-ahead adder using subthreshold Adiabatic logic”, International Journal of Emerging Trends in Science and Technology, vol. 3, Issue 6, pp. 891-895, June 2016.
[4] Y. Sunil Gavaskar Reddy, V.V.G.S.Rajendra Prasad, “Comparison of CMOS and Adiabatic Full Adder Circuits”, International Journal of Scientific & Engineering Research, vol. 2, Issue 9, September 2011.
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